Application of a silicon complier to VLSI design of digital pipelined multipliers

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applicationofsil00carl.pdf (8.59 MB)
Authors
Carlson, Dennis J.
Subjects
VLSI design
MacPitts
Pipelined multipliers
Silicon compiler
CAD tools
Advisors
Kirk, Donald E.
Date of Issue
1984-06
Date
June 1984
Publisher
Language
en_US
Abstract
The concept and application of silicon compilers is described. The process of employing the MacPitts silicon compiler to design an 8-bit pipelined digital multiplier is presented, and the resulting design is evaluated. The process of installing and debugging the MacPitts compiler and the Caesar VLSI graphics editor on the VAX-11/780 computing facilities at NPS is documented in appendices.
Type
Thesis
Description
URI
https://hdl.handle.net/10945/19164
Series/Report No
Department
Department of Electrical and Computer Engineering
Organization
Naval Postgraduate School (U.S.)
Identifiers
NPS Report Number
Sponsors
Funder
Format
Citation
Distribution Statement
Approved for public release; distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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