Trustworthy system development through high-level synthesis

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Authors
Patterson, Isaac
Subjects
High-Level Syntheis
SystemC
Trustworthy System Development
Hardware-Oriented Security and Trust
Ma-licious Hardware
Electronic Design Automation
Electronic System-Level Design
Military Electronics
Sup-ply Chain Security
Advisors
Huffmire, Theodore
Date of Issue
2014-09
Date
Sep-14
Publisher
Monterey, California: Naval Postgraduate School
Language
Abstract
Major processor manufacturers have embraced the high-level synthesis (HLS) design philosophy. HLS offers the potential to explore the design space of electronic circuits and systems more efficiently than traditional methods. In this thesis, we investigate the ap-plication of HLS to hardware-oriented security and trust by developing a model of a simple 16-bit Central Processing Unit in the SystemC modeling language. We enhanced our processor with a simple security mechanism that enforces a memory integrity policy. The integrity policy allows a region of the program labeled as trustworthy to modify any address in data memory, but another region of the program labeled as untrustworthy is restricted to only being able to modify a specific region of data memory. Our timing results show that adding the integrity policy enforcement mechanism has a negligible effect on overall system performance.
Type
Thesis
Description
Series/Report No
Department
Computer Science
Organization
Identifiers
NPS Report Number
Sponsors
Funder
Format
Citation
Distribution Statement
Approved for public release; distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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