Designing Secure Systems on Reconfigurable Hardware
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Authors
Huffmire, Ted
Brotherton, Brett
Callegari, Nick
Valamehr, Jonathan
White, Jeff
Kastner, Ryan
Sherwood, Ted
Subjects
Design
Security
Security
Advisors
Date of Issue
2008
Date
[2008]
Publisher
Naval Postgraduate School (U.S).
Language
Abstract
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom
hardware. Embedded systems based on reconfigurable hardware integrate many functions onto a single device. Since embedded designers often have no choice but to use soft IP cores obtained from third parties, the cores operate at different trust levels, resulting in mixed trust designs. The goal of this project is to evaluate recently proposed security primitives for reconfigurable hardware by building a real embedded system with several cores on a single FPGA and implementing these primitives on the system. Overcoming the practical problems of integrating multiple cores together with security mechanisms will help us to develop realistic security policy specifications that drive enforcement mechanisms on embedded systems.
Type
Article
Description
Series/Report No
Department
Computer Science (CS)
Identifiers
NPS Report Number
Sponsors
Funder
Format
Citation
ACM 978-1-60558-300-6/08/10.
Distribution Statement
Approved for public release; distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.