Publication:
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors

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Authors
Valamehr, Jonathan
Huffmire, Ted
Irvine, Cynthia
Kastner, Ryan
Kaya Koc, Cetin
Levin, Timothy
Sherwood, Timothy
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2012
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2012
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Abstract
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware community. Traditionally, crypto coprocessors have been implemented as a separate die or by utilizing one or more cores in a chip multiprocessor. These methods have their drawbacks and limitations in terms of tamper-resistance, side-channel immunity and performance. In this work we propose a new class of co-processors that are “snapped-on” to the main processor using 3-D integration, and we investigate their security ramifications. These 3-D co-processors hold many advantages over previous implementations. This paper begins with an overview of 3-D integration and its prior applications.We then outline security threat models relevant to crypto co-processors and discuss the advantages and disadvantages of using a dedicated 3-D crypto co-processor compared to traditional, commodity, off-chip crypto co-processors. We also discuss the performance improvements that can be gained from using a 3-D approach.
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Conference Paper
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Naccache, D., Ed., Berlin Heidelberg: Springer-Verlag, 2012, vol. 6805, pp. 364-382.
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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