Configurable Fault-Tolerant Processor (CFTP) for Space Based Applications

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Authors
Ebert, Dean A.
Hulme, Charles A.
Loomis, Herschel H.
Ross, Alan A.
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Date of Issue
2003-08
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Language
en_US
Abstract
The harsh radiation environment of space, the propensity for SEUs to perturb the operations of silicon based electronics, the rapid development of microprocessor capabilities and hence software applications, and the high cost (dollars and time) to develop and prove a system, require flexible, reliable, low cost, rapidly developed system solutions. Consequently, a reconfigurable Triple Modular Redundant (TMR) System-on-a-Chip (SOC) utilizing Field Programmable Gate Arrays (FPGAs) provides a viable solution for space based systems. The Configurable Fault Tolerant Processor (CFTP) is such a system, designed specifically for the purpose of testing and evaluating, on orbit, the reliability of instantiated TMR soft-core microprocessors, as well as the ability to reconfigure the system to support any onboard processor function.
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Conference Paper
Description
17th Annual AIAA/USU Conference on Small Satellites
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Sponsors
Space Systems Academic Group, Naval Postgraduate School, Monterey, California.
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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