Using Monterey Phoenix to Formalize and Verify System Architectures
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Authors
Zhang, Jiexin
Liu, Yang
Auguston, Mikhail
Sun, Jun
Dong, Jin Song
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Date of Issue
2013-09-13
Date
December 4 – 7, 2012
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Abstract
Modeling and analyzing software architectures are useful for helping to understand the system structures and facilitate proper implementation of user requirements. Despite its importance in the software engineering practice, the lack of formal description and verification support hinders the development of quality architectural models. In this work, we develop an approach for modeling and verifying software architectures specified using Monterey Phoenix (MP) architecture description language. Firstly, we formalize the syntax and operational semantics for MP. This language is capable of modeling system and environment behaviors based on event traces, as well as supporting different architecture composition operations and views. Secondly, a dedicated model checker for MP is developed based on PAT verification framework. Finally, several case studies are presented to evaluate the usability and effectiveness of our approach.
Type
Conference Paper
Description
19th Asia-Pacific Software Engineering Conference APSEC 2012, December 4 – 7, 2012, Hong Kong
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Department
Computer Science (CS)
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Citation
Jiexin Zhang, Yang Liu, Auguston, Mikhail, Jun Sun and Jin Song Dong, “Using Monterey Phoenix to Formalize and Verify System Architectures”, 19th Asia-Pacific Software Engineering Conference APSEC 2012, December 4 – 7, 2012, Hong Kong
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.