High Resolution Encoding Circuit and Process for Analog to Digital Conversion
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Authors
Pace, Phillip E.
Subjects
Advisors
Date of Issue
1997-04-01
Date
Publisher
The Government of the United States of America, as represented by the Secretary of the Navy, Washington, DC (US)
Language
Abstract
An analog-to-digital converter in which an analog input signal is folded by a plurality of folding circuits whose moduli, and hence half folding periods, are mutually prime with respect to one another. Each folding circuit has an associated comparator ladder having one less comparator than the modulus of the folding circuit. The collective output of the ladders, i,e, the states of the comparators in the ladders, uniquely corresponds to input signal magnitude over a dynamic range equal to the product of the folding circuits' moduli, permitting a greater dynamic range for the converter for the number of comparators used.
Type
Patent
Description
Series/Report No
Department
Organization
Naval Postgraduate School (U.S.)
Identifiers
5,617,092
NPS Report Number
Sponsors
Funder
Format
Citation
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.