Implementing a Software Defined Radio Using the Maestro 49-Tile Processor
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Authors
Loomis, Herschel
Kragh, Frank
Dinolt, George
Subjects
Advisors
Date of Issue
2015
Date
2015
Publisher
IEEE
Language
Abstract
The Maestro 49-tile Radiation-Hard-by-Design chip
was developed to demonstrate the application of spacequalified, multicore hardware. We have investigated the
implementation of a single precision floating-point pipeline
FFT to be used as part of a Software Defined Radio (SDR)
application. The details of the software architecture that can
adapt to the use of different numbers of tiles and the
performance of the N-point FFTs for N = 128, 512, 1024, and
2048 are described. The maximum throughput achieved for a
2048-point FFT is 27 million samples per second when 20 of
the 49 available tiles are used for separate FFT blocks, one tile
is used for input data distribution, and one tile is used for
output data collection. We also report on the performance of
the SDR based upon the FFT experiments.
Type
Article
Description
The article of record as published may be found at http://dx.doi.org/10.1109/AERO.2015.7119153
Published in: 2015 IEEE Aerospace Conference
Published in: 2015 IEEE Aerospace Conference
Series/Report No
Department
Electrical and Computer Engineering (ECE)
Computer Science (CS)
Organization
Naval Postgraduate School (U.S.)
Identifiers
NPS Report Number
Sponsors
Funding
Format
14 p.
Citation
Loomis, Herschel, Frank Kragh, and George Dinolt. "Implementing a software defined radio using the maestro 49-tile processor." 2015 IEEE aerospace conference. IEEE, 2015.
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.