EXPLORING CUSTOM HARDWARE TO ACCELERATE A PROGRAM BY LEVERAGING PARALLELISM

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Authors
Davis, Javen E.
Subjects
custom hardware
field-programmable gate array
FPGA
parallelism
parallel computing
Xilinx University
Xilinx ecosystem
PYNQ-Z1
Vivado design suite
electronic design automation
EDA
Advisors
Huffmire, Theodore D.
Date of Issue
2021-06
Date
Publisher
Monterey, CA; Naval Postgraduate School
Language
Abstract
It is essential that computer science students learn how to leverage parallelism to accelerate their applications due to the dramatic slowing of sequential CPU performance. One way that computer scientists can leverage parallelism is through custom hardware like field-programmable gate arrays (FPGAs). Unfortunately, traditional FPGA development requires years of training in electrical engineering, digital design, and hardware description languages (HDLs), like Verilog or VHDL, and rigid electronic design automation (EDA) tools. To address this problem, this capstone developed a simple lab for a university-level computer architecture course that provides students with hands-on experience with custom hardware, allowing students with typical programming knowledge skills to learn how to use FPGAs without requiring a steep learning curve. Utilizing the Xilinx ecosystem, which consists of a low-cost FPGA board, the Vivado suite of design tools, and an intuitive programming language, this capstone project resulted in the successful implementation of a lab activity and manual involving the conversion of an adder circuit from Python to a working circuit on a Xilinx FPGA.
Type
Thesis
Capstone
Description
Series/Report No
Department
Computer Science (CS)
Organization
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NPS Report Number
Sponsors
Funder
Format
Citation
Distribution Statement
Approved for public release. Distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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