A method to predict the thermal performance of printed circuit board mounted solid state devices
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Authors
Kelleher, Matthew D.
Subjects
Electronics Cooling
Thermal Network Analysis
Thermal Network Analysis
Advisors
Date of Issue
1975-07-31
Date
7/31/1975
Publisher
Monterey, California. Naval Postgraduate School
Language
Abstract
The objective was to formulate a design procedure to be used in the prediction of the thermal performance of printed circuit board mounted solid state devices (specifically 14 and 16 pin DIP's and TO-3 and TO-66 transistor cases). The project consists of an analytical phase which constitutes the actual formulation of the design procedure in the form of a digital computer program with appropriate documentation and an experimental phase which involves testing of actual P-C boards to verify the analytical model
Type
Technical Report
Description
Series/Report No
Department
Organization
Identifiers
NPS Report Number
NPS-59Kk75071
Sponsors
Prepared for: Naval Electronics Laboratory
San Diego, California
Funding
N009537P000035
Format
Citation
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.