Analysis of Intel IA-64 processor support for secure systems

Abstract

Current architectures typically focus on the software-based protection mechanisms rather than hardware for providing protection. In fact, hardware security mechanisms can be critical for the construction of a secure system. If hardware security mechanisms are properly utilized in a system, security policy enforcement can be simplified. Systems could be constructed for which serious security threats would be eliminated. This thesis explores the Intel IA-64 processor's hardware support and its relationship to software for building a secure system. To analyze the support provided by the architecture, hardware protection mechanisms were examined. This analysis focused on the following mechanisms: privilege levels, access rights, region identifiers and protection key registers. Since protection checks are made through the translation lookaside buffer (TLB) during the virtual-to-physical translations, the TLB structure was an area of focus throughout the research for this thesis. Proper use of the TLB-based hardware protection features permits protection in the IA-64 architecture. It enables the processor hardware and the operating system to collaborate to enforce security policies efficiently.