Testing of a CMOS VLSI IC for real-time opto-electronic two-dimensional histogram generation
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Authors
Reinagel, Peter J.
Subjects
Advisors
Pieper, Ron J.
Fouts, Douglas J.
Date of Issue
1995-03
Date
March 1995
Publisher
Monterey, California. Naval Postgraduate School
Language
en_US
Abstract
A recently fabricated CMOS VLSI IC was designed to generate two-dimensional histograms in real-time on digital computers. This thesis reports the efforts to determine if the 2DHlST IC chip functions as designed. Tests were conducted with a logic analyzer, general purpose electronic test equipment, and circuit simulation software.
Type
Thesis
Description
Series/Report No
Department
Electrical Engineering
Organization
Identifiers
NPS Report Number
Sponsors
Funder
NA
Format
111 p.
Citation
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.