VLSI implementation of a digitally programmable three stage GIC filter

Abstract

In this research, a multiple stage analog active filter is analyzed and designed using periodic sampling techniques. A General Immitance Converter (GIC) is the basic building block used to realize VLSI implementation of a three stage, bi-quadratic, digitally programmable filter. The manufacture of this microchip is the initial step in development of a stray insensitive CMOS GIC filter. Switched capacitor networks are used to facilitate component layout accuracies, further reducing the filters sensitivity to component tolerances. Simulations of extracted CMOS filter circuits are compared to simulations using PSPICE models. The final goal of this thesis is a manufactured CMOS microchip suitable for further development and testing.