Single event upsets in gallium arsenide dynamic logic
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Authors
Fouts, D.J.
Weatherford, T.
McMorrow, C.
Melinger, J.S.
Campbell, A.B.
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Date of Issue
1994-12-01
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Abstract
The advantages and disadvantages of using gallium arsenide (GaAs) dynamic logic in computers and digital systems are briefly discussed, especially with respect to space applications. A short introduction to the topology and operation of GaAs Two-Phase Dynamic FET Logic (TDFL) circuits is presented. Experiments for testing the SEU sensitivity of GaAs TDFL, using a laser to create charge collection events, are described. Results are used to estimate the heavy-ion, soft error rate for TDFL in a spacecraft in geosynchronous orbit, and the dependence of the SEU sensitivity on clock frequency, clock voltage, and clock phase. Analysis of the data includes a comparison between the SEU sensitivities of TDFL and the more common static form of GaAs logic, Directly Coupled FET Logic (DCFL). This is the first reported SEU testing of GaAs dynamic logic.
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Article
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Naval Postgraduate School (U.S.)
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None
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Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States); Journal Volume: 41:6Pt1; Conference: 31. annual international nuclear and space radiation effects conference, Tucson, AZ (United States), 18-22 Jul 1994
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.