Radiation tolerant, high speed, low power gallium arsenide logic

dc.contributor.advisorFouts, Douglas J.
dc.contributor.authorWolfe, Kurt A.
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.contributor.departmentDepartment of Electrical and Computer Engineering
dc.contributor.secondreaderLoomis, Herschel
dc.dateDecember 1993
dc.description.abstractGallium Arsenide (GaAs) circuits are largely immune to slowly accumulated radiation doses and therefore do not need the shielding required by complementary metal oxide semiconductor (CMOS) devices. This attribute renders GaAs circuits particularly attractive for space craft and military applications. However, it has been shown that GaAs circuits with short gate length transistors are excessively susceptible to single event upsets (SEU) due to enhanced charge collection at the edges of the gate called 'edge effect'. This thesis studies the SEU problem in two parts. Extensive computer modeling and simulation of a charged particle passing through various transistors of a low power, two-phase dynamic MESFET logic (IDFL) test chip was conducted using HSPICE in the first part. In the second part, new GaAs logic topologies are developed, simulated, and layed out in integrated circuits which require less power than directly coupled MESFET logic (DCFL) and should be less susceptible to single event upsets than TDFL circuits.en_US
dc.description.distributionstatementApproved for public release; distribution is unlimited.
dc.description.serviceLieutenant, United States Navyen_US
dc.format.extent111 p.en_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.en_US
dc.subject.authorSingle event upseten_US
dc.subject.authorGallium arsenid logicen_US
dc.titleRadiation tolerant, high speed, low power gallium arsenide logicen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
3.11 MB
Adobe Portable Document Format