Publication:
Design, Testing, and Evaluation of GaAs PN Sequence Generator Circuits Implemented in DCFL and TDFL

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Authors
Schimpf, Michael W.
Subjects
Advisors
Fouts, Douglas J.
Date of Issue
1997-09
Date
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Monterey, California: Naval Postgraduate School
Language
en_US
Abstract
Spaceborne and military communications hardware demands very high speed circuitry even under high radiation exposure. GaAs field effect transistors have the desirable quality that they possess rapid switching rates and are inherently more resistant to total-dose radiation induced failure than their silicon CMOS counterparts. This thesis project involves the design. simulation, submission for fabrication. testing. and evaluation of a 1 -GHz. 7-bit, pseudo-noise sequence generator (PNSG) which has numerous communications applications. particularly in spread-spectrum communications. The basic design of the PNSG is provided first,then topology-specific design considerations are covered for directly-coupled FET logic (DCFL) and two-phase dynamic FET logic (TDFL) implementations. Analysis and comparison of circuit performance characteristics are completed, demonstrating the significant improvement in speed, layout area, and power consumption that dynamic logic offers.
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Department
Electrical and Computer Engineering
Organization
Naval Postgraduate School
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