Hardware Trust Implications of 3-D Integration
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Authors
Huffmire, Ted
Levin, Timothy
Bilzor, Michael
Irvine, Cynthia E.
Valamehr, Jonathan
Tiwari, Mohit
Sherwood, Timothy
Kastner, Ryan
Subjects
3-D Integration and Security
Advisors
Date of Issue
2010-10
Date
October 2010
Publisher
Language
Abstract
3-D circuit-level integration is a chip fabrication technique
in which two or more dies are stacked and combined into
a single circuit through the use of vertical electroconductive
posts. Since the dies may be manufactured separately, 3-D
circuit integration offers the option of enhancing a commodity
processor with a variety of security functions. This paper
examines the 3-D design approach and provides an analysis
concluding that the commodity die system need not be independently
trustworthy for the system of joined dies to provide
certain trustworthy functions. In addition to describing
the range of possible security enhancements (such as cryptographic
services), we describe the ways in which multiple-die
subsystems can depend on each other, and a set of processing
abstractions and general design constraints with examples to
address these dependencies.
Type
Conference Paper
Presentation
Presentation
Description
Proceedings of the 5th Workshop on Embedded Systems Security (WESS), Scottsdale, AZ, October 2010, Pages 1-10. [Paper] [Workshop] [Slides]
Series/Report No
Department
Computer Science (CS)
Organization
Identifiers
NPS Report Number
Sponsors
Funder
Format
Citation
Ted Huffmire, Timothy Levin, Michael Bilzor, Cynthia E. Irvine, Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner, Hardware Trust Implications of 3-D Integration. Proceedings of the 5th Workshop on Embedded Systems Security (WESS), Scottsdale, AZ, October 2010, Pages 1-10.
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.