Employment of Reduced Precision Redundancy for Fault Tolerant FPGA Applications
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Authors
Sullivan, Margaret A.
Loomis, Herschel H.
Ross, Alan A.
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2009
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Abstract
This research explores the employment of
Reduced Precision Redundancy (RPR) as a powersaving
alternative to traditional Triple Modular
Redundancy (TMR). This paper focuses on the details
of RPR implementation and the effect of RPR fault
tolerance on the performance of spacecraft systems.
RPR-protected system performance is evaluated using
a signal-to-noise ratio analogy developed with
MATLAB and Simulink computational tools. This
research demonstrates that RPR is an effective fault
tolerance approach for arithmetic operations
Experimental results show that the benefit of RPR
increases with the complexity of the operation to which
it is applied. System performance simulations
demonstrate that RPR provides very good recovery
from errors caused by SEE in spacecraft systems.
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Article
Description
2009 17th IEEE Symposium on Field Programmable Custom Computing Machines
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Space Systems Academic Group
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.