Node to processor allocation for large grain data flow graphs in throughput-critical applications
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Authors
Cardany, John Paul
Subjects
NA
Advisors
Shukla, Shridhar B.
Date of Issue
1994-06
Date
June, 1994
Publisher
Monterey, California. Naval Postgraduate School
Language
en_US
Abstract
This thesis describes the issues involved in node allocation for a Large Grain Data Flow (LGDF) model used in Navy signal processing applications. In the model studied, nodes are assigned to processors based on load balancing, communication/computation overlap, and memory module contention. Current models using the Revolving Cylinder (RC) technique for LGDF graph analysis do not adequately address node allocation. Thus, a node to processor allocation component is added to a computer simulator of an LGDF graph model. It is demonstrated that the RC technique, when proper node allocation is taken into account, can improve overall throughput as compared to the First-Come-First- Served (FCFS) technique for high communication/computation costs
Type
Thesis
Description
Series/Report No
Department
Electrical Engineering
Organization
NA
Identifiers
NPS Report Number
Sponsors
Funder
NA
Format
88 p.;28 cm.
Citation
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.