Designing a virtual-memory implementation using the Motorola MC68010 16 bit microprocessor with multi-processor capability interfaced to the VMEbus
Authors
Sendek, David M.
Advisors
Abbott, Larry W.
Second Readers
Terman, Fred W.
Subjects
MC68010 Microprocessor
VMEbus
Virtual-Memory
Dual-port Memory
Multi-processor
VMEbus
Virtual-Memory
Dual-port Memory
Multi-processor
Date of Issue
1990-06
Date
1990-06
Publisher
Monterey, CA; Naval Postgraduate School
Language
Abstract
The primary purpose of this thesis is to explore and discuss the hardware design of a bus-oriented microprocessor system. A bus-oriented microprocessor system permits it to be expanded to a multi-processor system. Through the use of a bus controller and bus arbiter, as discussed in this thesis, the necessary logic is in place to control bus access by system users. Bus access may be initiated to share another sub-system's resource, such as memory. To accommodate memory sharing between two systems, a dual-port memory controller can be used to resolve memory access between the two systems. This thesis discusses the design of a MC68010 microprocessor system integrated on the VMEbus with dual-ported memory capability. Additional features of the MC68010 microprocessor system include memory-management and interrupt control. The memory-management features permit protected memory and virtual-memory to be implemented on the system, while an interrupt handler is used to assist the MC68010 microprocessor in exception processing.
Type
Thesis
Description
Series/Report No
Department
Electrical Engineering
Organization
Identifiers
NPS Report Number
Sponsors
Funding
Format
xi, 162 p.
Citation
Distribution Statement
Approved for public release; distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
