Investigation into efficient conversion methods between residue and binary systems
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Authors
Gilbert, David E.
Subjects
residue number systems
VLSI
ROM
programmable logic array
VLSI
ROM
programmable logic array
Advisors
Yang, Chyan
Date of Issue
1991-09
Date
September 1991
Publisher
Monterey, California. Naval Postgraduate School
Language
en_US
Abstract
Residue number systems (RNS) can efficiently perform addition, subtraction,
and multiplication in a parallel and fault tolerant manner. Because of this, they hold
significant promise for use in digital signal processing, where high speed arithmetic
operators are needed. However, the difficulties in using RNS, such as magnitude
comparison between two RNS values, division, and determining overflow or underflow
out of system range, have prevented more widespread use of these systems. This
thesis investigates traditional methods to perform comparisons and to propose some
new ones. Proposals include residue number system with quotient (RNS-Q), residue
number system quotient-on-demand (RNS-QD), and pipelined conversions from traditional
RNS to a mixed radix representation. These proposals will be compared with
traditional methods with respect to silicon area needed for implementation, speed
with which they can be developed, and VLSI techniques utilized to carry out the
design.
Type
Thesis
Description
Series/Report No
Department
Organization
Naval Postgraduate School (U.S.)
Identifiers
NPS Report Number
Sponsors
Funding
Format
47 p.;28 cm.
Citation
Distribution Statement
Approved for public release; distribution is unlimited.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.