The design, simulation, and fabrication of a BiCMOS VLSI digitally programmable GIC filter
Loading...
Authors
Milne, Paul R.
Subjects
Advisors
Michael, Sherif
Date of Issue
2001-09
Date
Publisher
Monterey, California. Naval Postgraduate School
Language
Abstract
This thesis used a previously-designed programmable GIC filter as a basis in which to incorporate a BiCMOS operational amplifier. An NPN bipolar transistor layout was designed and incorporated into an opamp layout, which was a modified version of a CMOS-only design. The BiCMOS opamp was simulated using Silvaco SmartSpice and showed considerable improvement over its CMOS equivalent. Additional improvements were made to the GIC filter to include a passgate with reduced resistance, and a correction was made to the capacitor layout. Simulations were also performed on a switchedcapacitor bilinear resistor and a switched-capacitor variable bilinear resistor. Results from the bilinear resistor simulations require further study and testing. Finally, a VLSI layout of the filter was accomplished using LASI and has been submitted to MOSIS for fabrication.
Type
Thesis
Description
Series/Report No
Department
Electrical Engineering
Organization
Naval Postgraduate School (U.S.)
Identifiers
NPS Report Number
Sponsors
Funding
Format
xviii, 77 p. ;
Citation
Distribution Statement
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.