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dc.contributor.advisorTurner, John B.
dc.contributor.advisorCotton, Mitchell L.
dc.contributor.authorBarr, Robert M.
dc.date.accessioned2012-08-29T23:32:46Z
dc.date.available2012-08-29T23:32:46Z
dc.date.issued1960
dc.identifier.urihttp://hdl.handle.net/10945/12475
dc.description.abstractThe desired response of a logical network can be expressed as a one column matrix of bistable elements, defining the "function" of the network. To date methods of logical network synthesis and simplification have been concerned with manipulations of the network input?. This investigation treats with the network design as a manipulation of symmetrical properties of the fiinction itself. It will be shown that this treatment not onn y leads to a logical expression for the network configuration, but can also provide a clue to desirable properties cf circuit elements not yet designed, as developed, the network representation will take the form cf conventional and- or gating plus a postulated complementing device.en_US
dc.description.urihttp://www.archive.org/details/investigationofs00barr
dc.language.isoen_US
dc.publisherMonterey, California: U.S. Naval Postgraduate Schoolen_US
dc.subject.lcshElectronicsen_US
dc.titleAn investigation of the symmetric properties of logical functionsen_US
dc.typeThesisen_US
dc.contributor.departmentElectronics
dc.description.serviceLieutenant Commander, United States Navyen_US
etd.thesisdegree.nameM.S. in Engineering Electronicsen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineEngineering Electronicsen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US


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