Steps toward a compiler for BLISS-360.

Download
Author
Bahler, Richard Charles
Date
1972Advisor
Kildall, Gary A.
Metadata
Show full item recordAbstract
The design of a compiler for the IBM s/360 systems implementation language BLISS-360, a modification of the PDP-10 language BLISS-10, is described. The compiler has a two-pass structure that is based upon the XPL Compiler Generator System. The first of these passes, which uses the XPL prototype compiler Skeleton, is examined in some detail. Fundamental data structures are described for this pass, including a constant table, a dictionary for variable definitions, and an intermediate language table to retain the source program structure and semantics. Modifications which allow the Skeleton compiler to perform a syntax analysis of BLISS-360 programs are discussed and demonstrated. General requirements are defined for the functions to be performed by the second pass, including machine language code generation from the intermediate language, storage allocation and building program interface linkage.
Rights
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.Collections
Related items
Showing items related by title, author, creator and subject.
-
An investigation into the development of an XPL compiler for the CDC 6000 series computers.
Diedrich, Paul Otto (Monterey, California. Naval Postgraduate School, 1971-12);An XPL compiler is described which executes on an IBM 360/65 computer and directly produces machine code for a CDC 6000 series machine. The emphasis is on local optimization techniques used in the compiler. The compiler ... -
Silicon compiler design of combinational and pipeline adder integrated circuits.
Froede, Alexander O. III. (1985-06);The architecture and structures used by the MacPitts silicon compiler to design integrated circuits are described, and the capabilities and limitations of the compiler are discussed. The performance of several combinational ... -
Implementation of a design for testability strategy using the Genesil silicon compiler
Davidson, John Carl (Monterey, California. Naval Postgraduate School, 1989-03);Design for Testability (DFT) is receiving major emphasis in the very large scale integration design field due to increasing circuit complexity. The utility of the silicon compiler and its value to a system designer without ...