Hardware implementation of recursive fixed-point filters for minimum quantization noise
Rodolfo, Carlos Jose de Almeida Rodrigues
Powers, V. Michael
MetadataShow full item record
Design and implementation of recursive digital filters with f'ixed point arithmetic using special hardware are considered in detail and applied to a mechanization of a second order filter structure with variable coefficients. Two new methods of performing quantization after arithmetic operations within a digital filter are presented: quantization after addition and quantization before multiplication. Both methods are shown applicable to hardware implementation of digital filters and offer advantages over the usual quantization after multiplication. Error bounds are derived for these two quantization schemes and compared with the results previously obtained by other authors. It is concluded that the quantization before multiplication is the most suitable for hardware filter implementation. A design modification of the presently available hardware chips in order to permit round-off or truncation before multiplication is presented
RightsCopyright is reserved by the copyright owner.
Showing items related by title, author, creator and subject.
FPGA implementation of robust symmetrical number system in high-speed folding analog-to-digital converters Lim, Han Wei (Monterey, California. Naval Postgraduate School, 2010-12);Analog-To-Digital Converters (ADCs) are integral building blocks of most sensor and communication systems today. As the need for ADCs with faster conversion speeds and lower power dissipation increases, there is a growing ...
Kubicki, Adam R. (Monterey, California: Naval Postgraduate School, 1999-09);In this research, the design and implementation of an integrated circuit, digitally programmable, analog to analog filter are presented. By functioning in the analog domain the quantization errors and hardware requirements ...
Watkins, Bruce E. (Monterey, California. Naval Postgraduate School, 1991-09);This thesis investigates the application of artificial neural networks for the compression of image data. An algorithm is developed using the competitive learning paradigm which takes advantage of the parallel processing ...