Signal processor interface simulation of the AN/SPY-1A radar controller
Kersh, Todd B.
Kodres, Uno R.
Mercer, Brad D.
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This thesis reports on the design and implementation of a simulation of the Signal Processor Interface to the AN/SPY-1A Phased Array Radar Controller. Inherent to the simulation is the development of a representative time sensitive database of the targeting environment. The programming language Ada was utilized as a program development language in the design for the database. The developed Target Database utilizes the 20 mega-byte REMEX Data Warehouse 3200 memory storage unit. The simulation of the Signal Processor Interface will allow real time testing of the Naval Postgraduate School's AN/ SPY-1A Radar Controller System Model.
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