VLSI design of a very fast pipelined carry look ahead adder
vlsidesignofvery00conr.pdf (11.90Mb)Abstract
This thesis is an introduction to the use of computer-aided design (CAD tools for the design of very large scale integrated circuits (VLSI). The techniques are described and a tutorial is given which illustrates their use in the computing environment at the Naval Postgraduate School. The CAD tools were applied to design a 16-bit fast pipelined adder.
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