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VLSI design of a very fast pipelined carry look ahead adder

dc.contributor.advisorKirk, Donald E.
dc.contributor.authorConradi, Joseph Robert
dc.contributor.authorHauenstein, Bruce Robert
dc.dateSeptember 1983
dc.date.accessioned2012-11-20T00:00:22Z
dc.date.available2012-11-20T00:00:22Z
dc.date.issued1983-09
dc.identifier.urihttps://hdl.handle.net/10945/20032
dc.description.abstractThis thesis is an introduction to the use of computer-aided design (CAD tools for the design of very large scale integrated circuits (VLSI). The techniques are described and a tutorial is given which illustrates their use in the computing environment at the Naval Postgraduate School. The CAD tools were applied to design a 16-bit fast pipelined adder.en_US
dc.description.urihttp://archive.org/details/vlsidesignofvery1094520032
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.en_US
dc.titleVLSI design of a very fast pipelined carry look ahead adderen_US
dc.typeThesisen_US
dc.contributor.secondreaderStrum, Robert D.
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.contributor.departmentDepartment of Electrical Engineering
dc.subject.authorCAD toolsen_US
dc.subject.authorVLSI designen_US
dc.subject.author16-bit pipelined adderen_US
dc.description.serviceLieutenant, United States Navyen_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US
dc.description.distributionstatementApproved for public release; distribution is unlimited.


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