Image segmentation using the military specification 1750A microprocessor
Cody, Percy Dean, III
Gerba, Alex, Jr.
MetadataShow full item record
The use of computers to process various types of sensor data Is becoming increasingly common, in both civilian and military applications. One example of this use is the enhancement of photographs to increase their clarity, or emphasize a particular detail. Previously, the computers used to perform this processing was done in specialized circuits, mainframe or minicomputers. More recently, extremely powerful microprocessors have become available that show potential to be applied in this area. This thesis explores a particular class of image processing, known as Image Separation, implemented on a Fairchild F9450, the first civilian version of the 1750A military specification microprocessor. This microprocessor along with its associate chip set, appears well suited to image processing, having high speed capability, direct floating point arithmetic instructions, multiprocessing capacity, and the ability to address up to sixteen megabytes of memory. Additionally, a sophisticated software development tool set, known as Microprocessor Pascal, is available to develop and test software for the 1750A/F9450 microprocessor. This tool set allows software to be developed on the VAX-11/780 minicomputer, targeted for final use on the a750A/F9450. This work utilized the Microprocessor Pascal tool set to test and compare representative Image Separation algorithms. The speeds of execution and code sizes of the programs were determined for the F9450/1750A microprocessor and the VAX-11/780 minicomputer, and were compared to determine the feasibility of using the F9450/1750-A microprocessor for image separation work. Several images resulting from the image segmentation processing are included, as well as the OASCAL programs used to perform the processing.
Approved for public release; distribution is unlimited
Showing items related by title, author, creator and subject.
Designing a virtual-memory implementation using the Motorola MC68010 16 bit microprocessor with multi-processor capability interfaced to the VMEbus Sendek, David M. (Monterey, California: Naval Postgraduate School, 1990-06);The primary purpose of this thesis is to explore and discuss the hardware design of a bus-oriented microprocessor system. A bus-oriented microprocessor system permits it to be expanded to a multi-processor system. Through ...
Seveney, James Arthur; Steinberg, Guenter Peter (Monterey, California. Naval Postgraduate School, 1990-06);The U.S. Navy has recently embarked on a program called Next Generation Computer Resources (NGCR) whose aim is a cooperative effort between Navy and industry to field a set of state of the art computers for shipboard use ...
Ekstrom, Robert Harry; Reinhardt, William Henry, III (Monterey, California. Naval Postgraduate School, 1975-06);A functional design of a microprocessor-based system is proposed as a model for the Naval Environmental Display Station for use by the Naval Weather Service Environmental Detachments. The design consists of four modules: ...