The RISC architecture and computer performance evaluation
Barros, Manuel Filipe Pedrosa de
Rigas, Harriett B.
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A definition of Reduced Instruction Set Computers is developed. A computer performance model which allows the evaluation of architectural alternatives is presented. An example on the use of the model to compute the performance alternatives for a given application is presented to study the effect of the addition of an instruction to. a processor instruction set.
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