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dc.contributor.advisorKirk, Donald E.
dc.contributor.authorBainbridge, Richard Lee
dc.dateMarch 1987
dc.date.accessioned2012-11-27T00:28:48Z
dc.date.available2012-11-27T00:28:48Z
dc.date.issued1987-03
dc.identifier.urihttp://hdl.handle.net/10945/22805
dc.descriptionApproved for public release; distribution is unlimiteden_US
dc.description.abstractParallel implementations of Fast Fourier Transforms (FFTs) and other Fast transforms are represented using factored, partitioned matrices. the factored matrix description of a distributed FFT is introduced using a decimation-in-time (DIT) FFT algorithm suitable for implementation on a distributed parallel processor. The heart of the matrix representation of distributed fast transforms is the use of permutations of an NxN identity matrix to describe the required later-processor data transfers on the Butterfly Network. The properties of there "transfer matrices" and the resulting output ordering are discussed in detail. The factored-matrix representation is then used to show that the Fast Hartley Transform (FHT) and the Walsh-Hadamard Transform (WHT) are supported by the Butterfly Network.en_US
dc.description.urihttp://archive.org/details/factoredmatrixre00bain
dc.format.extent142 p.en_US
dc.language.isoen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.subject.lcshElectrical and computer engineeringen_US
dc.titleFactored-matrix representation of distributed fast transformsen_US
dc.typeThesisen_US
dc.contributor.secondreaderTherrien, Charles W.
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.contributor.departmentElectrical and Computer Engineering
dc.subject.authorFast Fourier transformen_US
dc.subject.authorFast Hartley Transformen_US
dc.subject.authorWalsh-Hadamard Transformen_US
dc.subject.authorParallel processingen_US
dc.subject.authorDistributed signal processoren_US
dc.subject.authorButterfly Networken_US
dc.description.serviceLieutenant, United States Navyen_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US


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