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dc.contributor.advisorKodres, Uno R.
dc.contributor.authorBryant, Gregory R.
dc.date.accessioned2012-11-27T18:17:04Z
dc.date.available2012-11-27T18:17:04Z
dc.date.issued1988-06
dc.identifier.urihttps://hdl.handle.net/10945/23158
dc.description.abstractThis thesis presents the design, implementation and evaluation of two abstracted programming and communication interfaces for developing distributed programs on a network of Transputers. One interface uses a shared memory model for interprocess communication and synchronization. The other interface uses a message passing model for communication and synchronization. The programming interfaces allow development of distributed programs that are independent of the physical configuration of a network. This thesis also presents an evaluation of Transputer performance with a particular emphasis on the interaction of computation and inter-Transputer communication. The Transputer is a single chip microprocessor that has been specifically designed to function as a computing element in a distributed multicomputer system. As the transistor was a building block for large and varied electronic circuits, the Transputer is intended by the manufacturer to be an analogous building block for distributed computing systems. To facilitate the use of the Transputer as an element in a distributed system, the Transputer implements the concept of Communicating Sequential Processes. Communicating Sequential Processes is a paradigm which defines and describes the interaction of programs that execute in parallel (as is the case in a distributed system). Keywords: OCCAM programming language, High level languages. (KR)en_US
dc.description.urihttp://archive.org/details/designimplementa1094523158
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.subject.lcshComputer scienceen_US
dc.titleDesign, implementation and evaluation of an abstract programming and communications interface for a network of transputersen_US
dc.typeThesisen_US
dc.contributor.secondreaderAdams, Richard A.
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.subject.authorDistributed computingen_US
dc.subject.authorTransputeren_US
dc.subject.authorOCCAMen_US
dc.subject.authorNetworken_US
dc.subject.authorEvent Counts and Sequencersen_US
dc.subject.authorCommunicating Sequential Processesen_US
dc.description.serviceLieutenant Commander, United States Navyen_US
etd.thesisdegree.nameM.S. in Computer Scienceen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineComputer Scienceen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US
dc.description.distributionstatementApproved for public release; distribution is unlimited.


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