Design of multiple-valued programmable logic arrays
Ko, Yong Ha
Butler, Jon T.
MetadataShow full item record
The goal of this thesis is the development of a programmable logic array (PLA) that accepts multiple-valued inputs and produces multiple valued outputs. The PLA is implemented in CMOS and multiple levels are encoded as current. It is programmed by choosing transistor geometries which control the current level at which the PLA reacts to inputs. An example of a 4-valued PLA is shown. As part of this research, a C program was written that produces a PLA layout.
Approved for public release; distribution is unlimited
Showing items related by title, author, creator and subject.
On an application of symbolic computation and computer graphics to root-finders: The case of multiple roots of unknown multiplicity Neta, Beny; Petković, Ivan (Elsevier B.V., 2016);The contemporary powerful mathematical software enables a new approach to handling and manipulating complex mathematical expressions and other mathematical objects. Particularly, the use of symbolic computation leads to ...
Yale, G.; Agrawal, B.N. (1994);This paper concerns the cooperative control of multiple manipulators attached to the same base as they reposition a common payload. The theory is easily applied to inertially based problems as well as space based free-floating ...
McCamish, Shawn B. (Monterey, California. Naval Postgraduate School, 2007., 2007-12);This research contributes to multiple spacecraft control by developing an autonomous distributed control algorithm for close proximity operations of multiple spacecraft systems, including rendezvous and docking scenarios. ...