Implementation and testing of a new 16-PSK transmitter.
Brock, George S.
Bukofzer, Daniel C.
Myers, Glen A.
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The work reported herein deals with the design, implementation, and testing the performance of a specific 16-PSK transmitter for use in conjunction (in future tests) with a specific direct bit detection receiver. A specific design procedure is utilized for generating sets of 2" phase shifted sinusoids with constant phase difference, each of which represents an n bit symbol. The design of the 16-PSK transmitter is extendable to the implementation of higher order M-PSK transmitters, i.e., M = 32, 64, etc. The procedure utilizes a shift register and associated digital devices to produce a set of square waveforms each of which is equally and successively delayed by a fixed time increment. Frequency selective filtering is then employed to convert this collection of square waves to a set of sinusoids while maintaining the time and therefore the desired phase relationship amongst members of the set. This implementation made it possible to produce an offset 16-PSK signal constellation whose members were all of equal amplitude and possessed the desired phase relationships to within one tenth of a degree. The signal constellation was highly stable and displayed an average phase drift amongst its members of less than three tenths of a degree after five and one half hours of operation. Photographs of signals in the time domain and displays of signals in the frequency domain are presented in order to highlight the important features of the system's performance.
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