Infinite impulse response notch filter
Loomis, Herschel H., Jr.
MetadataShow full item record
A pipeline technique by Loomis and Sinha has been applied to the design of recursive digital filters. Recursive digital filters operating at hitherto impossibly high rates can be designed by this technique. An alternate technique by R. Gnanasekaran allows high speed implementation using the state-space structure directly. High throughput is also achieved by use of pipelined multiply-add modules. The actual hardware complexity will depend upon the number of pipeline stages. These techniques are used for the design of the I IR notch filter and finally, a comparison of the performance and complexity of these two techniques is presented.
Approved for public release; distribution is unlimited
Showing items related by title, author, creator and subject.
Aakre, Thor Davis (Monterey, California. Naval Postgraduate School, 1993-09);This thesis presents a new technique for loop pipelining of perfectly-nested for-loop structures which is designed to optimize loop execution on VLIW machines. Previously implemented loop pipelining techniques provide ...
Kung, Chih-fu (Monterey, California. Naval Postgraduate School, 1990-03);To implement an IIR notch filter is theoretically feasible but not technically verified or validated. Two methods often used to speed up a computation are multiprocessing and pipelining. In designing a notch filter the ...
Design of a synchronous pipelined multiplier and analysis of clock skew in high-speed digital systems Calvert, John R. (Monterey, California. Naval Postgraduate School, 2000-12);Digital systems implemented with high-speed transistor technologies face a variety of design challenges in an effort to keep pace with the accelerating demand for performance. As device switching frequencies climb comfortably ...