Ferroelectric memory devices and a proposed standardized test system design
dc.contributor.advisor | Panholzer, Rudolf | |
dc.contributor.author | Covelli, Javier M. | |
dc.date | June 1992 | |
dc.date.accessioned | 2012-11-29T16:14:35Z | |
dc.date.available | 2012-11-29T16:14:35Z | |
dc.date.issued | 1992-06 | |
dc.identifier.uri | https://hdl.handle.net/10945/23676 | |
dc.description.abstract | Ferroelectric bulk material devices have been in existence for over 20 years, Not until recently has there been fabrication techniques that consistently and feasibly produce thin film ferroelectric materials. The physical characteristics of thin-film ferroelectric capacitors and their subsequent integration into memory design may prove ferroelectric devices to be the ultimate in design for non-volatile, radiation hard computer memory. This analysis describes current memory systems, some of the recent achievements in ferroelectrics and the prospects for further application of ferroelectrics and the prospects for further application of ferroelectrics as an alternative for current memory design. It explores the different testing methodologies being implemented to test ferroelectric devices and suggests a flexible, fully programmable and autonomous new test system design to allow high speed aging and fatigue testing of on-chip ferroelectric capacitors for memory applications. | en_US |
dc.description.uri | http://archive.org/details/ferroelectricmem1094523676 | |
dc.format.extent | 124 p. | en_US |
dc.language.iso | en_US | |
dc.publisher | Monterey, California. Naval Postgraduate School | en_US |
dc.rights | This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States. | en_US |
dc.title | Ferroelectric memory devices and a proposed standardized test system design | en_US |
dc.type | Thesis | en_US |
dc.contributor.secondreader | Wight, Randy Lee | |
dc.contributor.corporate | Naval Postgraduate School (U.S.) | |
dc.contributor.department | Electrical and Computer Engineering | |
dc.subject.author | Current memory | en_US |
dc.subject.author | Ferroelectric capacitor | en_US |
dc.subject.author | Stress measurement system | en_US |
dc.subject.author | Standardized test system | en_US |
dc.description.service | Lieutenant, United States Navy | en_US |
etd.thesisdegree.name | M.S. in Electrical Engineering (Space Systems Engineering) | en_US |
etd.thesisdegree.level | Masters | en_US |
etd.thesisdegree.discipline | Electrical Engineering (Space Systems Engineering) | en_US |
etd.thesisdegree.grantor | Naval Postgraduate School | en_US |
dc.description.distributionstatement | Approved for public release; distribution is unlimited. |
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