Show simple item record

dc.contributor.advisorShukla, Shridhar
dc.contributor.authorLittle, Brian S.
dc.dateDecember 1991
dc.date.accessioned2013-01-23T22:05:58Z
dc.date.available2013-01-23T22:05:58Z
dc.date.issued1991-09
dc.identifier.urihttp://hdl.handle.net/10945/26805
dc.description.abstractThe AN/UYS-2 provides the Navy with a state of the art Digital Signal Processor. The AN-UYS-2 is programmed utilizing the Processing Graph Methodology (PGM), which represents specific tasks as nodes in a graph. It utilizes a simple First-Come-First Served (FCFS) run-time resource allocation mechanism that supports large-grain data flow processing. While the mechanism is robust, easy to implement, and results in low run-time overhead, it is difficult to predict of a given PGM will meet the application requirements. Therefor, an approach that uses compile-time analysis to exploit the periodic arrival of data and a priori knowledge of the amount of computation and communication overhead is investigated. Improvement in performance of the machine when the PGM graphs are restructures using this approach, called Revolving Cylinder scheduling, is observed; and it is found to be effective when there is a high communication overhead or when the PGM nodes are of uniform size.en_US
dc.description.urihttp://archive.org/details/atechniqueforpre1094526805
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.en_US
dc.subject.lcshSignal processingen_US
dc.titleA technique for predictable real-time execution in the AN/UYS-2 parallel signal processing architectureen_US
dc.typeThesisen_US
dc.contributor.secondreaderYang, Chyan
dc.contributor.corporateNaval Postgraduate School
dc.contributor.departmentDepartment of Electrical and Computer Engineering
dc.subject.authorAN/UYS-2en_US
dc.subject.authorData-flow processingen_US
dc.subject.authorProcessing Graph Methodologyen_US
dc.subject.authorSignal processingen_US
dc.subject.authorSchedulingen_US
dc.subject.authorLarge-grain data-flow architectureen_US
dc.description.serviceLieutenant, United States Navyen_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US
dc.description.distributionstatementApproved for public release; distribution is unlimited.


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record