Field programmable gate array hysteresis control of parallel connected inverters

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Authors
Lund, John J.
Subjects
Advisors
Ashton, Robert
Date of Issue
2006-06
Date
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Monterey, California. Naval Postgraduate School
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Abstract
This thesis presents the use of a Field Programmable Gate Array (FPGA) to control two Commercial-Off-The-Shelf (COTS) Power Electronic Building Blocks (PEBB) configured to produce a three-phase low distortion sine wave output. The next generation warship is expected to contain more electric loads that require quality variable frequency output. A typical propulsion motor in the 40MW range will probably require the current Total Harmonic Distortion to be less than 3% (MIL-STD-1399). However, high power low distortion inverters usually have associated high cost and weight penalties. This thesis presents a parallel hybrid converter which demonstrates the use of a high power low fidelity bulk inverter with a low power high fidelity active filter. The high power low fidelity output is sourced using a six-step inverter which produces the entire fundamental current. The low power hysteresis controlled active filter section produces only cancelling harmonic current. The paralleled result is a pristine output sine wave with a 1% current Total Harmonic Distortion (THD). This solution should offer the Navy a high fidelity high power inverter without the cost and weight penalties.
Type
Thesis
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Naval Postgraduate School (U.S.)
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Format
xviii, 107 p. : col. ill. ;
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Approved for public release; distribution is unlimited.
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