A microprocessor interface for the NM24CF04 serial-access ferroelectric memory.
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Authors
Gonter, Thomas C.
Subjects
Ferroelectric memory
FERRAM
NM24CF04
nonvolatile memory
FERRAM
NM24CF04
nonvolatile memory
Advisors
Fouts, Douglas J.
Date of Issue
1991-12
Date
Publisher
Monterey, California. Naval Postgraduate School
Language
en_US
Abstract
The goal of this study was to demonstrate the feasibility of utilizing ferroelectric memory as a portion of main microprocessor memory.
An interface between National Semiconductor's NM24CF04, a nonvolatile, serial-access, ferroelectric memory device, and Intel's 8086
microprocessor was designed and implemented. This thesis discusses the architectural and implementation problems that arise
when installing this ferroelectric memory device as a portion of main memory. The actions of the interface are detailed to explain the control and
timing requirements necessary to effectively perform write and read operations on the NM24CF04.
Type
Thesis
Description
Series/Report No
Department
Electrical Engineering
Organization
Naval Postgraduate School
Identifiers
NPS Report Number
Sponsors
Funder
Format
93 p.;28 cm.
Citation
Distribution Statement
Approved for public release; distribution is unlimited.