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dc.contributor.authorBrown, Gerald G.
dc.date1975-08
dc.date.accessioned2013-03-07T21:53:33Z
dc.date.available2013-03-07T21:53:33Z
dc.date.issued1975-08
dc.identifier.urihttp://hdl.handle.net/10945/30035
dc.description.abstractAn experiment with matrix inversion using block pivots is presented. Large scale matrix computations can often be performed more efficiently by use of partitioning. Such matrix manipulation lends itself to paged or cache memory systems since computation is staged to be completely performed in local blocks of controllable size. On other systems retrieval overhead can be balanced with computation for 'in-memory/out-of-memory' applications. Parallelism in such schema leads to efficient utilization of some multiple processor environments. Timing results indicate, however, that choice of block size should not necessarily be dictated by hardware page size for most efficient operation and that classical methods of estimating computation times are not always adequateen_US
dc.description.sponsorshipsponsored by a grant from the Research Foundation, Naval Postgraduate Schoolen_US
dc.description.urihttp://archive.org/details/numericalperform00brow
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.subject.lcshSOUND--TRANSMISSION--RESEARCH.en_US
dc.titleNumerical performance of matrix inversion with block pivotingen_US
dc.typeTechnical Reporten_US
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.subject.authorLarge Scale Mathematical Programmingen_US
dc.subject.authorPage Processingen_US
dc.subject.authorLarge Scale Linear Programmingen_US
dc.subject.authorVirtual Memory Systemsen_US
dc.subject.authorFactorization Methods in Optimizationen_US
dc.subject.authorMatrix Storage Allocationen_US
dc.subject.authorPaged Memory Arithmeticen_US
dc.subject.authorNumerical Algorithm Performanceen_US
dc.description.funderN0001475WR50001en_US
dc.identifier.npsreportNPS55Zr75081


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