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dc.contributor.advisorFouts, Douglas J.
dc.contributor.authorGinter, Byron A.
dc.dateDecember, 1994
dc.date.accessioned2013-04-26T18:58:39Z
dc.date.available2013-04-26T18:58:39Z
dc.date.issued1994-12
dc.identifier.urihttp://hdl.handle.net/10945/30816
dc.description.abstractThe goal of this project is to redesign, fabricate, and assemble a digital circuit operating near a frequency of 250 MHz to test a new experimental Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM). This thesis presents the redesigned six-layer printed circuit test fixture and the design of the DRAM hold down clamp necessary to affix the DRAM to the test fixture. The use of commercially available Computer Aided Design (CAD) and Computer Aided Manufacturing CAM) tools were used for layout and fabrication. Finally, the assembly and testing of the test fixture, as well as problems encountered during the redesign, fabrication, and assembly processes, are discussed.en_US
dc.description.urihttp://archive.org/details/designfabricatio1094530816
dc.format.extent68 p.;28 cm.en_US
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.titleDesign, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI ICen_US
dc.typeThesisen_US
dc.contributor.secondreaderNA
dc.contributor.corporateNA
dc.contributor.departmentElectrical Engineering
dc.subject.authorNAen_US
dc.description.funderNAen_US
dc.description.recognitionNAen_US
dc.description.serviceU.S. Navy (U.S.N.) author.en_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US


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