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dc.contributor.advisorFouts, Douglas J.
dc.contributor.authorDickerson, James H.
dc.dateMarch, 1994
dc.date.accessioned2013-04-26T18:59:47Z
dc.date.available2013-04-26T18:59:47Z
dc.date.issued1994-03
dc.identifier.urihttp://hdl.handle.net/10945/30897
dc.description.abstractThe goal of this research project was to design a VLSI implementation of the required digital circuitry to utilize ferroelectric memory as a portion of main microprocessor memory. An interface between National Semiconductor's NM24CF04, a nunvolatile, serial-access, ferroelectric memory device, and Intel's 8086 microprocessor was designed and implemented using SSI/MSI technology III a previous study. This thesis discusses the redesign of the previously designed circuit for VLSI implementation. The layout was accomplished using the Magic graphical layout editor and tested using the Esim event driven logic-level simulator.en_US
dc.description.urihttp://archive.org/details/avlsiinterfacefo1094530897
dc.language.isoen_US
dc.publisherMonterey, California. Naval Postgraduate Schoolen_US
dc.rightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.titleA VLSI interface for the NM24CF04 serial-access ferroelectric memoryen_US
dc.typeThesisen_US
dc.contributor.secondreaderLee, Chin-Hwa
dc.contributor.corporateNaval Postgraduate School (U.S.)
dc.contributor.departmentElectrical Engineering
dc.subject.authorFerroelectric memory, FERRAM, NM24CF04, nonvolatile meory, VLSIen_US
dc.description.serviceLieutenant, United States Navyen_US
etd.thesisdegree.nameM.S. in Electrical Engineeringen_US
etd.thesisdegree.levelMastersen_US
etd.thesisdegree.disciplineElectrical Engineeringen_US
etd.thesisdegree.grantorNaval Postgraduate Schoolen_US


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