Module compiler for high-radix CCD-PLA's
Abstract
A complier has been developed that translates a multiple-valued logic expression into a circuit which realizes that expression. The circuits produced are for the high-radix peristaltic charged-coupled device (P2CCD) technology described by us in 1986. Each design is a programmable logic array (PLA), including the required sense amplifiers, dummy registers, voltage-to-charge converters, and precharge transistors. The multiple-valued expression is repsented as a sum-of-products of literal operations, which product is the minimum operation and sum is the truncated sum operation. An example of a PLA implementation produced by the complier is given.
Description
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.
International Journal of Electronics, Vol. 67, No. 5, November 1989, pp. 797-805