Module compiler for high-radix CCD-PLA's

Abstract

A complier has been developed that translates a multiple-valued logic expression into a circuit which realizes that expression. The circuits produced are for the high-radix peristaltic charged-coupled device (P2CCD) technology described by us in 1986. Each design is a programmable logic array (PLA), including the required sense amplifiers, dummy registers, voltage-to-charge converters, and precharge transistors. The multiple-valued expression is repsented as a sum-of-products of literal operations, which product is the minimum operation and sum is the truncated sum operation. An example of a PLA implementation produced by the complier is given.