HAMLET - An expression compiler/optimizer for the implementation of heuristics to minimize multiple-valued programmable logic arrays
Yurchak, John M.
Butler, Jon T.
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HAMLET is a CAD tool that translates a user specification of a multiple-valued expression into a layout of a multiple-valued programmable logic array (MVL-PLA) which realizes that expression. It is modular to accommodate future minimization heuristics and future MVL-PLA technologies. At present, it implements two heuristics,  and  and one MVL-PLA technology, current-mode CMOS . Specifically, HAMLET accepts a sum-of-products expression from the user, applies a minimization heuristic, and then produces a PLA layout of a multiple-valued current-mode CMOS PLA. Besides its design capabilities, HAMLET can also analyze heuristics. Random functions can be generated, heuristics applied, and statistics computed on the results. User-derived expressions can also be analyzed. In addition to the minimlization heuristics  and , HAMLET can apply search strategies based on these heuristics, which, in the extreme, is exhaustive, producing true minimal forms. HAMLET is available to the public; instructions on how to obtain this program are in Appendix A. It is written in C and conforms to the UNIX command line format.
Proceedings of the 20th International Symposium on Multiple-Valued Logic, May 1990, pp. 144-152
RightsThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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Oral, Sabri Onur (Monterey, California. Naval Postgraduate School, 1991-09);The process of finding an exact minimization for a multiple-valued logic (MVL) expression requires an extensive search and enormous computation time. One of the heuristics to reduce this computation time is the Neighborhood ...
Yang, Chyan; Wang, Yao-Ming (IEEE, 2002-08-06);There has been considerable interest in heuristic method for minimizing multiple-valued logic functions because exact methods are intractable. This paper describes a new heuristic, called the neighborhood decoupling (ND) ...
Barton, Robert James (Monterey, California. Naval Postgraduate School, 1995-09);This thesis describes the design and implementation of a carry save adder cell for multivalued logic VLSI. A four valued system was chosen and the logic was analyzed and minimized using the HAMLET CAD tool. SPICE was used ...