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dc.contributor.authorNagayama, Shinobu
dc.contributor.authorSasao, Tsutomu
dc.contributor.authorButler, Jon T.
dc.dateAugust 27 - 31, 2007
dc.date.accessioned2013-09-03T22:32:58Z
dc.date.available2013-09-03T22:32:58Z
dc.date.issued2007-08
dc.identifier.citationS. Nagayama, T. Sasao, and J. T. Butler, "Design method of numerical function generators based on polynomial approximation for FPGA implementation," DSD 2007, 10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools, Aug. 27 - 31, 2007, Lubeck, Germany, pp. 280-287.
dc.identifier.urihttp://hdl.handle.net/10945/35823
dc.descriptionDSD 2007, 10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools, Aug. 27 - 31, 2007, Lubeck, Germany, pp. 280-287.en_US
dc.descriptionThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.description.abstractThis paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces signicantly the NFG's memory size. However, larger k requires more logic elements and multipliers.numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces signicantly the NFG's memory size. However, larger k requires more logic elements and multipliers. To quantify this tradeoff, we introduce the FPGA utilization measure, and then determine the optimum polynomial order k. Experimental results show that: 1) for low accuracies (up to 17 bits), 1st order polynomial approximations produce the most efficient implementations; and 2) for higher accuracies (18 to 24 bits), 2nd-order polynomial approximations produce the most efficient implementations.en_US
dc.titleDesign method of numerical function generators based on polynomial approximation for FPGA implementationen_US
dc.typeArticleen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineering


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