Hardware index to permutation converter
Butler, Jon T.
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We demonstrate a circuit that generates a permutation in response to an index. Since there are n! n-element permutations, the index ranges from 0 to n! Ã Â¢ 1. Such a circuit is needed in the hardware implementation of unique-permutation hash functions to specify how parallel machines interact through a shared memory. Such a circuit is also needed in cryptographic applications. The circuit is based on the factorial number system. Here, each non-negative integer is uniquely represented as snÃ Â¢ 1(nÃ Â¢ 1)! +snÃ Â¢ 2(nÃ Â¢ 2)! +...+s11!, where 1 Ã Â¢ Ã Â¤ si Ã Â¢ Ã Â¤ i. That is, the permutation is produced by generating the digits si in the factorial number system representation of the index. The circuit is combinational and is easily pipelined to produce one permutation per clock period. We give experimental results that show the efÃ Â¯Ã Â¬ ciency of our designs. For example. we show that the rate of production of permutations on the SRC-6 reconÃ Â¯Ã Â¬ gurable computer is 1,820 times faster than a program on a conventional microprocessor in the case of 10-element permutations. We also show an efÃ Â¯Ã Â¬ cient reconÃ Â¯Ã Â¬ gurable computer implementation that produces random permutations using the Knuth shufÃ Â¯Ã Â¬ e algorithm. This is useful in Monte Carlo simulations. For both circuits, the complexity is O(n2), and the delay is O(n).
19th Reconfigurable Architectures Workshop, May 21-22, 2012, Shanghai, China.
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