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dc.contributor.authorNagayama, Shinobu
dc.contributor.authorSasao, Tsutomu
dc.contributor.authorButler, Jon T.
dc.date2006-01
dc.date.accessioned2013-09-03T22:33:05Z
dc.date.available2013-09-03T22:33:05Z
dc.date.issued2006-01
dc.identifier.citationS. Nagayama, T. Sasao, and J. T. Butler, "Programmable numerical function generators based on quadratic approximation: Architecture and synthesis method," ASPDAC 2006, Yokohama Jan. 2006, pp. 378-383.
dc.identifier.urihttp://hdl.handle.net/10945/35859
dc.descriptionASPDAC 2006, Yokohama Jan. 2006, pp. 378-383.en_US
dc.descriptionThis publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted.en_US
dc.description.abstractThis paper presents an arhitecture and a synthesis method for programmable numerical function generators (NFGs) for trigonometric, logarithmic, square root, and reciprocal functions. Our NFG partitions a given domain of the function into non-uniform segments using an LUT cascade, and approximates the given function by a quadratic polynomial for each segment. Thus, we can implement fast and compact NFGs for a wide range of functions. Implementation results on an FPGA show that: 1) our NFGs require only 4% of the memory needed by NFGs based on the 5th-order approximation with uniform segmentation. Our automatic synthesis system generates such compact NFGs quickly.en_US
dc.titleProgrammable numerical function generators based on quadratic approximation: Architecture and synthesis methoden_US
dc.typeArticleen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineering


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