Specification and analysis of a high speed transport protocol
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Author
Tipici, H. Alphan.
Date
1993-06Advisor
Lundy, G.M.
Second Reader
Shing, Man-Tak
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While networks have been getting faster, perceived throughput at the application has not always increased accordingly and the bottleneck has moved to the communications processing part of the system. The issues that cause the performance bottlenecks in the current transport protocols are discussed in this thesis, and a further study on a high speed transport protocol which tries to overcome these difficulties with some unique features is presented. By using the Systems of Communicating Machines (SCM) model as a framework, a refined and improved version of the formal protocol specification is built over the previous work, and it is analyzed to verify that the protocol is free from logical errors such as deadlock, unspecified reception, unexecuted transitions and blocking loops. The analysis is conducted in two phases which consists of the application of the associated system state analysis and the simulation of the protocol using the programming language ADA. The thesis also presents the difficulties encountered during the course of the analysis, and suggests possible solutions to some of the problems.
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