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Planar Decision Diagrams for Multiple-Valued Functions

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Author
Sasao, Tsutomu
Butler, Jon T.
Date
1996
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Abstract
In VLSI, crossings of interconnect occupy space and cause delay. Therefore, there is significant benefit to planar circuits. We propose the use of planar multiple-valued decision diagrams for produce planar multiple-valued circuits. Specifically, we show conditions on 1) threshold funtions, 2) symmetric functions, and 3) monotone increasing functions that produce planar diagrams. Our results apply to binary functions, as well. For example, we show that two-valued monotone increasing threshold functions of up to five variables have planar ordered binary decision diagrams.
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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http://hdl.handle.net/10945/40341
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