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Fast Hardware Computation of x mod z

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Author
Butler, J.T.
Sasao, T.
Date
2011-05
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Abstract
We show a high-speed hardware implementation of xmod z that can be pipelined in O(n ° m) stages, where x is represented in n bits and z is represented in m bits. It is suitable for large x. We offer two versions. In the first, the value of z is fixed by the hardware. For example, using this circuit, we show a random number generator that produces more than 11 million random numbers per second on the SRC-6 reconfigurable computer. In the second, z is an independent input. This is suitable for RNS number system applications, for example. The second version can be pipelined in O(n) stages.
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This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.
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http://hdl.handle.net/10945/45462
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